Phase-Locked Loop Circuit Design Dan H. Wolaver
Publisher: Prentice Hall

Design of Monolithic Phase-Locked Loopsand Clock Recovery Circuits-A TutorialBehzad RazaviAbstract - This paper describes the principles of phase-locked system design with emphasis on monolithic imple-mentations. Figure 1 contains a block diagram of a basic PLL frequency multiplier. ADI ADF41020 Microwave PLL Synthesizer is designed to significantly reduce component count and system cost while improving performance in next-generation radio designs. Analog FastSPICE™ Platform Delivers Silicon-Accurate 300fs Jitter PLL Characterization. Clock Design Tool - Loop Filter & Device Configuration + Simulation, CLOCKDESIGNTOOL, Software. Nandu Bhagwan is the President and CEO of GHz Circuits, Inc. For reference use, this book is intended to rapidly increase a practicing engineer's knowledge of modern analog circuit design. FM Transmitter with PLL In order to simplify the transmitter design, we've used the new pll circuit from Motorola :the MC145170. Each of these applications demands different characteristics but they all use the same basic circuit concept. In this video interview with John Pierce of Cadence he talks about PLL design challenges. Modern coverage of phase-locked-loops including the popular charge-pump approach. This PLL includes the prescaler and a serial standard bus called SPI.